TPU v5e supported configurations

The slice shapes you can request for TPU v5e, and how many chips and hosts each uses.

Slice shapes

Note: A slice shape gives the number of chips along each dimension of the interconnect. A 2D shape is written AxB and a 3D shape AxBxC. Multiply the dimensions to get the number of chips in the slice.

Topology

TPU chips

Hosts

1x1

1

1/8

2x2

4

1/2

2x4

8

1

4x4

16

2

4x8

32

4

8x8

64

8

8x16

128

16

16x16

256

32

Parent topic:TPU v5e