TPU v6e (Trillium) supported configurations¶
The slice shapes you can request for TPU v6e (Trillium), and how many chips and hosts each uses.
Slice shapes¶
Note: A slice shape gives the number of chips along each dimension of the interconnect. A 2D shape is written AxB and a 3D shape AxBxC. Multiply the dimensions to get the number of chips in the slice.
Topology |
TPU chips |
Hosts |
VMs |
Machine type |
Scope |
|---|---|---|---|---|---|
1x1 |
1 |
1/8 |
1 |
ct6e-standard-1t |
Sub-host |
2x2 |
4 |
1/2 |
1 |
ct6e-standard-4t |
Sub-host |
2x4 |
8 |
1 |
1 |
ct6e-standard-8t |
Single-host |
2x4 |
8 |
1 |
2 |
ct6e-standard-4t |
Multi-host |
4x4 |
16 |
2 |
4 |
ct6e-standard-4t |
Multi-host |
4x8 |
32 |
4 |
8 |
ct6e-standard-4t |
Multi-host |
8x8 |
64 |
8 |
16 |
ct6e-standard-4t |
Multi-host |
8x16 |
128 |
16 |
32 |
ct6e-standard-4t |
Multi-host |
16x16 |
256 |
32 |
64 |
ct6e-standard-4t |
Multi-host |
The 2x4 multi-host configuration with two ct6e-standard-4t VMs is supported with GKE or Compute Engine, but not with the Cloud TPU API.
Parent topic:TPU v6e (Trillium)